Revision | Date | Change log |
4.2 | 2019-05-30 | Timing closure improvements, variable drive source bit widths |
4.1 | 2019-02-12 | Third drive source, synchronization signal outputs added to GPIO in interlock mode |
4.0 | 2018-12-07 | Added time-domain modulation to phase tracker, second drive source, multiple new hardware trigger sources |
3.15 | 2017-05-25 | GPIO instability interlock added, phase tracker inverter, SRAM/BRAM acquisition interface reworked |
3.14 | 2016-06-21 | Processing downsampling extended to 256, maximum kick monitor |
3.12 | 2014-04-21 | Single-bunch phase tracking (tune tracking) added, support for modified FBE-LT interface |
3.11 | 2014-02-06 | Acquisition readout speedup, removed obsolete ADC test pattern generator, fixed SRAM acquisition bug |
3.10 | 2014-01-10 | Quad coefficient sets with bunch-by-bunch selection |
3.09 | 2013-10-12 | Drive modulation with coefficient set select |
3.08 | 2013-09-03 | Trigger input inversion (rising/falling edge trigger), trigger snapshot in multibunch acquisition, new excitation code (48 bit phase accumulator) |