LLRF4.6 is an update of the older LLRF4 board described below. Differences between LLRF4 and LLRF4.6 are summarized in this document. The document also includes tables of supported LO frequency ranges and existing input channel IF filter configurations, as well as board schematics and some of the PCB layout.
LLRF4.6 is essentially compatible with the older LLRF4 board in mechanical outline (including connectors and mounting holes), host communication software, and FPGA source code (gateware). It features improved RF performance, and a larger FPGA. So, while existing HDL will need to be re-synthesized for the new FPGA using the updated pin mapping (llrf46.ucf, below), the result should function the same as before. There are a few small exceptions and caveats to the overall compatibility, so it's important to read the documentation before proceeding.
Firmware for the USB FX2 interface on LLRF4.6 is programmed in EEPROM, so that upon power-on the board is ready for FPGA programming. A customized version of xc3sprog JTAG utility can be used to load the bitfile to the FPGA. See below for the source code for this customized xc3sprog.
| File | Description | Date |
|---|---|---|
| packet46.pdf | Board documentation: changes relative to LLRF4, schematics, layout | 2014-07-07 |
| llrf46.ucf | FPGA UCF file: pin locations, I/O standards, pullup/pulldown definitions | 2014-07-02 |
| llrf4-fab-13aug2013.zip | PCB revision 4.6a fab package: Gerbers, drill files, readme | 2013-08-13 |
| llrf46-20130813.tar.xz | Complete design package (schematics, PCB, docs) | 2013-08-13 |
| xc3sprog-v5b.tar.gz | xc3sprog JTAG utility | 2014-01-27 |
Many different IF filter designs have been developed for the original LLRF4 and LLRF4.6. Some have only been tested on the older LLRF4.2 — see the table below. Level column in the table shows the bandwidth measurement level (drop in dB from the peak). For narrow filters, 3 dB measurement is appropriate, for wider ones, 1 and 0.5 dB bandwidth is specified. In all cases, full bandwidth from lower to upper magnitude drop points is listed.
| Name | Center frequency (MHz) | Bandwidth (MHz) | Level (dB) | Full-scale (dBm) |
|---|---|---|---|---|
| Tested on LLRF4.6 | ||||
| 50 MHz (original) | 48.5 | 9 | 3 | 11 |
| 39 MHz (Dimtel) | 39 | 5.5 | 3 | -4 |
| 50 MHz (Dimtel) | 50 | 12 | 3 | -4 |
| 74 MHz (Dimtel) | 74 | 11 | 3 | -3 |
| 81 MHz (Dimtel) | 81 | 12.4 | 3 | -3 |
| Wideband (J-PARC) | 34.1 | 68.1 | 0.5 | 6 |
| Tested on LLRF4.2 | ||||
| 110 MHz (FERMI) | 110 | 58 | 3 | -7 |
| 186 MHz (APEX) | 190 | 28 | 0.5 | -5 |
Detailed technical information on LLRF4 evaluation board is condensed in a write-up by Larry Doolittle. The document includes design choices, subsystem descriptions, schematics, part information, etc.
A wealth of technical information on LLRF4 is available at Larry Doolittle's web site.